1 Field of the Invention
The present invention relates to a semiconductor device and a method of manufacturing the same. More particularly, the invention relates to a semiconductor device and a method of manufacturing the same for making a defect harmless, which inevitably occurs in an insulating layer or the like in a highly integrated semiconductor circuit structure.
2 Description of the Background Art
As a semiconductor device is becoming smaller, it is inevitable that the interval between transfer gates is becoming shorter in a polypad type cell structure in which polypads are formed as electrodes of bit lines. Consequently, the aspect ratio of the gap between transfer gates is becoming higher and the gap is becoming deeper. Usually, a conductive interconnection of a transfer gate is patterned, a nitride film as a covering protection film is formed on the top face and side faces of the conductive interconnection and, further, an insulating layer is formed on the transfer gates so as to bury the gap between the transfer gates.
When there is a gap of a high aspect ratio between transfer gates as described above, at the time of forming an insulating layer, the gap between the transfer gates cannot be perfectly buried by the insulating layer. A void which extends long in the longitudinal direction of the transfer gate in a plan view often occurs in the insulating layer. FIG. 15 is a plan view showing arrangement of transfer gates and polypads in a DRAM (Dynamic Random Access Memory). FIG. 16 is a cross section taken along line XVI—XVI of FIG. 15. In FIG. 15, in an insulating interlayer 108 for burying the gap between two transfer gates 103, a region 109a with the high possibility of a void occurrence is extending along the gap. In FIG. 16, reference numeral 101 denotes a semiconductor substrate and reference numeral 103a denotes a nitride protection film. When a void 109 occurs in the region 109a as shown in FIG. 16, polysilicon enters the void at the time of depositing polysilicon for making a polypad, and a short circuit occurs between neighboring polypads 104a and 104b as shown in FIG. 17. In FIG. 17, polysilicon 114 for burying the void is deposited so as to connect the neighboring polypads 104a and 104b. When such a short circuit occurs, the product yield of manufacturing deteriorates. It might cause a delay in deliveries and the like.